It has been found that the same CMOS-based fabrication processes that are used to form electronic devices can be used to form both passive and active silicon-based optical devices, where in many cases a passive optical waveguide can be formed within the same integrated structure as an optical/electrical circuit. As such, the devices that perform the pure optical functions, the pure electrical functions and the opto-electronic functions can be produced concurrently, on the same substrate, and using the same process steps.
Passive optical waveguide devices, electronic devices and active optical waveguide devices, as well as methods of fabricating these devices, using standard CMOS processing techniques on a single Silicon-On-Insulator (SOI) wafer have been disclosed in our co-pending application Ser. No. 10/146,321, filed May 15, 2002. For example, pure electronic devices such as field effect transistors (FETs) can be fabricated using deposition, photolithography, ion implantation, etching processes, and the like, on an SOI wafer. Moreover, the passive optical waveguide devices and the active optical devices can be simultaneously fabricated on the SOI wafer. Advantageously, the masks and positioning equipment that are used for defining active electronic devices can also be used to simultaneously define both the passive optical waveguide devices and the active optical devices on the same substrate.
FIG. 1 contains an isometric view of a device including an optical waveguide arrangement 1 including a silicon waveguiding structure 2 and a relatively thin dielectric layer 3 disposed over a surface portion of an SOI wafer 4. SOI wafer 4 is illustrated as comprising a silicon substrate 5, a buried dielectric layer 6 and a relatively thin silicon surface layer 7. Optical waveguide structure 1, as depicted, will support propagation of an optical signal along the lateral extent of silicon waveguiding structure 2, as shown, with the waveguide itself comprising surface silicon layer 7, relatively thin dielectric layer 3 and silicon waveguiding structure 2. Buried dielectric layer 6 functions as a cladding layer for the waveguide structure and provides optical mode confinement. It is presumed, but not shown, that another dielectric material surrounds the exposed portions of dielectric layer 3 and silicon waveguiding structure 2 to provide for optical mode confinement within the silicon structure, where both silicon surface layer 7 and silicon waveguiding structure 2 have a greater refractive index value than the dielectric forming the cladding region of the waveguiding arrangement.
While the structure of FIG. 1 is useful in supporting optical propagation along an SOI wafer, it has been found that the sharp, right-angled edges and corners in silicon waveguiding structure 2, such as lower edge 8 and upper edge 9 illustrated in FIG. 1, can be significant sources of optical loss along the waveguide, particularly when the waveguide dimensions fall below 1 μm. In particular, right-angled edges 8 and 9 create a high optical field intensity, leading to optical signal loss within the waveguiding structure. Additionally, the physical roughness of sidewalls 2-1 and 2-2 of silicon waveguiding structure 2 have been found to introduce scattering losses into the propagating optical signal. More particularly, an optical signal propagating along an optical waveguide will exhibit different phase velocities at various points within the body of the waveguide, where at any corner—such as lower edge 8 and upper edge 9—the phase velocity becomes equivalent to that of the surrounding cladding material. The signal becomes a planar wave at that location and, therefore, will no longer remain guided within the waveguide. As mentioned above, signal loss becomes more of a problem as the sizes of the various elements, such as silicon surface layer 7 and silicon waveguide 2 are reduced to sub-micron dimensions, since a larger overall portion of the signal will be lost to the presence of these high optical field intensities.
Further, as more complicated sub-micron opto-electronic device structures are introduced into the SOI platform, the presence of optical signal loss becomes more problematic. Current design developments are requiring greater operating data rates, such as 1 Gb/s and above, where these requirements impose more demands on the SOI platform, and the ability to reduce optical signal loss is a primary goal of most developers.